Osaka, Japan

Kazuhisa Hirai

This inventor holds 1 USPTO granted patent. Top assignee: Megachips Corporation. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kazuhisa Hirai. Retrieved from https://idiyas.com/inventor/kazuhisa-hirai

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 2.0

ph-index = 1


Company Filing History:


Years Active: 2026

Loading Chart...
1 patent (USPTO):Explore Patents

Title: Kazuhisa Hirai: Successive-Approximation ADC Innovation

Introduction

Kazuhisa Hirai is an inventor associated with Megachips Corporation in Osaka, Japan. His patent work includes a successive-approximation analog-to-digital converter designed to improve conversion speed while limiting circuit growth.

Latest Patents

Hirai’s listed patent, “Successive-approximation analog-to-digital converter,” describes an ADC with a capacitor digital-to-analog converter (CDAC), a comparator, and logic that produces a digital output from an analog input. The CDAC combines a main capacitor bank with an auxiliary bank that supplies corrected capacitance values. A correction-designation circuit selects among pre-correction values based on comparator bit signals and calculates updated correction values. The invention aims to accelerate operation without substantially increasing circuit size. Hirai is associated with 1 patent.

Career Highlights

Hirai’s disclosed invention addresses circuit design and conversion performance in analog-to-digital systems. His work is associated with Megachips Corporation, a company involved in semiconductor technology.

Collaborations

Shingo Adachi is identified as Hirai’s coworker. The available information does not specify their particular collaboration on the patent.

Conclusion

Kazuhisa Hirai’s patent describes a correction-capacitance approach for improving successive-approximation ADC speed while controlling circuit size, reflecting his contribution to semiconductor innovation.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…