Higashiyamato, Japan

Katsuyuki Nakanishi

This inventor holds 2 USPTO granted patents. Top assignee: Renesas Technology Corp.. Active years: 2005-2007.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Katsuyuki Nakanishi. Retrieved from https://idiyas.com/inventor/katsuyuki-nakanishi

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

Average Co-Inventor Count = 5.0

ph-index = 2

Forward Citations = 5(Granted Patents)


Company Filing History:


Years Active: 2005-2007

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2 patents (USPTO):Explore Patents

Title: Katsuyuki Nakanishi: Innovator in Semiconductor Technology

Introduction

Katsuyuki Nakanishi is a prominent inventor based in Higashiyamato, Japan. He has made significant contributions to the field of semiconductor technology, holding a total of 2 patents. His work focuses on enhancing the reliability and performance of semiconductor devices.

Latest Patents

Nakanishi's latest patents include a semiconductor device and manufacturing method. The objective of this invention is to provide a semiconductor device that includes a circuit employing two or more field-effect transistors that are desired to have equal characteristics. This design is capable of realizing high reliability and superior transistor characteristics. The transistors are strategically placed in the semiconductor device to ensure they have the same STI trench width, which is the width of shallow trench isolation adjacent to the active area where the transistor is formed. By implementing this composition, the stress that develops in the active area due to the shallow trench isolation is equalized among the transistors, thereby equalizing their characteristics.

Career Highlights

Katsuyuki Nakanishi is currently employed at Renesas Technology Corporation, where he continues to innovate in semiconductor technology. His work has been instrumental in advancing the capabilities of semiconductor devices, making them more reliable and efficient.

Collaborations

Nakanishi has collaborated with notable colleagues in his field, including Yukihiro Kumagai and Hideo Miura. These collaborations have contributed to the development of cutting-edge technologies in the semiconductor industry.

Conclusion

Katsuyuki Nakanishi is a key figure in the semiconductor technology landscape, with a focus on improving device reliability and performance. His innovative patents and collaborations highlight his commitment to advancing this critical field.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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