Tokyo, Japan

Katsunobu Noguchi

This inventor holds 3 USPTO granted patents. Top assignee: Elpida Memory, Inc.. Active years: 2011-2013.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Katsunobu Noguchi. Retrieved from https://idiyas.com/inventor/katsunobu-noguchi

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 39(Granted Patents)


Company Filing History:


Years Active: 2011-2013

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3 patents (USPTO):Explore Patents

Title: Katsunobu Noguchi: Innovator in Semiconductor Technology

Introduction

Katsunobu Noguchi is a prominent inventor based in Tokyo, Japan. He has made significant contributions to the field of semiconductor technology, holding a total of 3 patents. His work focuses on enhancing the efficiency and functionality of semiconductor devices.

Latest Patents

One of his latest patents is titled "Semiconductor device and method of refreshing the same." This invention features an address scrambling circuit that performs address scrambling operations and a redundancy judging circuit that assesses redundancy judgments on the scrambled addresses. This innovative structure allows for a complete refresh operation concerning both normal and redundancy word lines. Another notable patent is "Semiconductor device for performing a refresh operation," which shares similar features and benefits, further emphasizing his expertise in this area.

Career Highlights

Katsunobu Noguchi is currently associated with Elpida Memory, Inc., where he continues to develop cutting-edge semiconductor technologies. His work has been instrumental in advancing the capabilities of semiconductor devices, making them more reliable and efficient.

Collaborations

He has collaborated with notable colleagues such as Tetsuaki Okahiro and Hiromasa Noda, contributing to various projects that enhance semiconductor technology.

Conclusion

Katsunobu Noguchi's innovative work in semiconductor technology has led to significant advancements in the field. His patents reflect a deep understanding of semiconductor operations and a commitment to improving device performance.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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