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For the Inventor, By the Inventor

Andover, MA, United States of America

Katsufumi Nakamura

This inventor holds 15 USPTO granted patents and 1 EPO patent. Top assignee: Analog Devices,inc.. Active years: 1998-2012.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Katsufumi Nakamura. Retrieved from https://idiyas.com/inventor/katsufumi-nakamura

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 15

% Patents Active = 93.3


Average Co-Inventor Count = 1.5

ph-index = 8

Forward Citations = 178(Granted Patents)


Location History:

  • Cambridge, MA (US) (1998 - 1999)
  • Boston, MA (US) (2002 - 2003)
  • Andover, MA (US) (2005 - 2012)

Company Filing History:

goldMedal15 out of 3,703 
 
Analog Devices,inc.
 patents

Years Active: 1998-2012

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15 patents (USPTO):Explore Patents
1. 8223892 - Data exchange between channels in a data acquisition system (2012-07-17),
2. 7298151 - Methods and apparatus for reducing thermal noise (2007-11-20),
3. 7265594 - Methods and apparatus for generating timing signals (2007-09-04),
4. 6965332 - Methods and apparatus for digital offset correction using an ADC with an increased input range (2005-11-15),
5. 6909311 - Methods and apparatus for synthesizing a clock signal (2005-06-21),
6. 6864820 - Analog-to-digital conversion using an increased input range (2005-03-08),
7. 6577183 - Offset correction circuit (2003-06-10),
8. 6441686 - Offset correction method and apparatus (2002-08-27),
9. 6433632 - Correlated double sampling circuit with op amp (2002-08-13),
10. 5986719 - Video signal clamping method and apparatus with negative peak detection (1999-11-16),
11. 5986502 - Multi-stage high-performance amplifier (1999-11-16),
12. 5867116 - Multi-stage interpolating analog-to-digital conversion (1999-02-02),
13. 5838199 - Multi-stage high-performance amplifier (1998-11-17),
14. 5767542 - Matching parasitic capacitances and characteristics of field effect (1998-06-16),
15. 5736886 - Input clamping method and apparatus with a correlated double-sampling (1998-04-07),

Title: Innovations of Katsufumi Nakamura

Introduction

Katsufumi Nakamura is a prominent inventor based in Andover, MA (US). He has made significant contributions to the field of data acquisition systems and thermal noise reduction. With a total of 15 patents to his name, Nakamura continues to push the boundaries of technology.

Latest Patents

One of his latest patents focuses on data exchange between channels in a data acquisition system. This invention discloses an apparatus and method for inter-channel data exchange in multi-channel data acquisition systems. The system includes a data exchange layer that couples two or more channels, allowing data to be transmitted between them. This enables data from one channel to be processed and output by another channel. The data exchange layer may consist of either a serial or parallel exchange layer. Another notable patent involves methods and apparatus for reducing thermal noise integrated on a storage element. This invention includes a sampling circuit with a sampling capacitor that stores a charge while being exposed to ambient temperature. The circuit is designed to sample the charge onto the capacitor, minimizing the power of the thermal noise sampled.

Career Highlights

Katsufumi Nakamura is currently employed at Analog Devices, Inc., where he applies his expertise in developing innovative solutions. His work has significantly impacted the efficiency and performance of data acquisition systems.

Collaborations

Throughout his career, Nakamura has collaborated with notable colleagues, including Steven J. Decker and David Paul Foley. These partnerships have fostered a creative environment that has led to groundbreaking advancements in their respective fields.

Conclusion

Katsufumi Nakamura's contributions to technology through his patents and collaborations highlight his role as a leading inventor in the industry. His work continues to influence advancements in data acquisition and thermal noise reduction.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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