Kaohsiung, Taiwan

Kang-Wei Ma

This inventor holds 2 USPTO granted patents. Top assignee: Advanced Semiconductor Engineering, Inc.. Active years: 2004-2007.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kang-Wei Ma. Retrieved from https://idiyas.com/inventor/kang-wei-ma

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 2.7

ph-index = 2

Forward Citations = 36(Granted Patents)


Company Filing History:


Years Active: 2004-2007

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2 patents (USPTO):Explore Patents

Title: Innovations of Kang-Wei Ma

Introduction

Kang-Wei Ma is a notable inventor based in Kaohsiung, Taiwan. He has made significant contributions to the field of semiconductor packaging, holding a total of 2 patents. His work focuses on improving the efficiency and reliability of semiconductor devices.

Latest Patents

Kang-Wei Ma's latest patents include a "Leadframe with die pad" and a "Packaging structure integrating passive devices." The leadframe patent describes a design that includes a die pad, tie bars, metal extrusions, and leads arranged around the die pad. This innovative design enhances ground connections through wire-bonding and secures the die pad without stress transmission. The second patent outlines a leadframe packaging structure that integrates passive devices, featuring a chip-bonding region and an encapsulant material that protects the components.

Career Highlights

Kang-Wei Ma is currently employed at Advanced Semiconductor Engineering, Inc., where he continues to develop cutting-edge technologies in semiconductor packaging. His work has been instrumental in advancing the capabilities of semiconductor devices.

Collaborations

Kang-Wei Ma has collaborated with notable colleagues such as Sheng-Tsung Liu and Shu-Chen Yang. Their combined expertise contributes to the innovative projects at Advanced Semiconductor Engineering, Inc.

Conclusion

Kang-Wei Ma's contributions to semiconductor packaging through his patents and collaborations highlight his role as a key innovator in the industry. His work continues to influence the development of reliable and efficient semiconductor technologies.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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