Kai Cheng Chou

Title: Innovations of Kai Cheng Chou in Non-Volatile Memory Technology

Introduction

Kai Cheng Chou is an accomplished inventor based in San Jose, California. She has made significant contributions to the field of semiconductor technology, particularly in the development of non-volatile memory arrays. Her innovative work has led to the filing of a patent that showcases her expertise and creativity in this area.

Latest Patents

Chou holds a patent for a "Method and structure for fabricating non-volatile memory arrays," specifically an MONOS integrated circuit device. This device features a semiconductor substrate made of silicon-bearing material, with a shallow trench isolation region formed within it. The design includes a P-type well region adjacent to the shallow trench isolation region. The first word gate is constructed with a first edge and a second edge, incorporating a first control gate and a second control gate. Additionally, a common buried bit line is formed within the P-type well region, enhancing the device's functionality. The device also includes an HDP plasma dielectric, which contributes to its planarized surface, ensuring optimal performance.

Career Highlights

Chou is currently employed at Winbond Electronics Corporation, where she continues to innovate in the semiconductor industry. Her work has been instrumental in advancing memory technology, and her patent reflects her commitment to excellence in engineering and design.

Collaborations

Throughout her career, Chou has collaborated with notable colleagues, including Harry Laun and J.C. Young. These partnerships have fostered a creative environment that encourages the exchange of ideas and the development of cutting-edge technologies.

Conclusion

Kai Cheng Chou's contributions to non-volatile memory technology exemplify her innovative spirit and technical expertise. Her patent and work at Winbond Electronics Corporation highlight her role as a leading inventor in the semiconductor field.