Jyh-Nan Jeng

Title: Jyh-Nan Jeng: Innovator in Polysilicon Transistor Technology

Introduction

Jyh-Nan Jeng is a prominent inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of semiconductor technology, particularly in the fabrication of polysilicon transistors. His innovative methods have paved the way for advancements in electronic devices.

Latest Patents

Jyh-Nan Jeng holds a patent for a "Method for fabricating a polysilicon transistor having a buried-gate." This invention involves a unique approach to creating a polysilicon transistor with a buried-gate structure. The method utilizes liquid phase deposition to selectively deposit a silicon dioxide layer on a polysilicon layer, while avoiding deposition on a photoresist layer. The process employs an aqueous hydrofluorosilicic acid (H.sub.2 SiF.sub.6) solution that is supersaturated with silicon dioxide. After the photoresist layer is stripped away, the selectively deposited silicon dioxide layer serves as a mask for performing source/drain ion implantation.

Career Highlights

Jyh-Nan Jeng is affiliated with the National Science Council, where he continues to engage in research and development in semiconductor technologies. His work has been instrumental in enhancing the efficiency and performance of electronic components.

Collaborations

Jyh-Nan Jeng has collaborated with fellow researcher Ching-Fa Yeh, contributing to advancements in their field through shared expertise and innovative ideas.

Conclusion

Jyh-Nan Jeng's contributions to polysilicon transistor technology exemplify the impact of innovative thinking in the semiconductor industry. His patent and ongoing research continue to influence the development of advanced electronic devices.