Toyonaka, Japan

Juurou Yasui

This inventor holds 1 USPTO granted patent. Top assignee: Matsushita Electric Industrial Co., Ltd.. Active years: 1995.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Juurou Yasui. Retrieved from https://idiyas.com/inventor/juurou-yasui

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 1

Forward Citations = 3(Granted Patents)


Company Filing History:


Years Active: 1995

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1 patent (USPTO):Explore Patents

Title: Juurou Yasui: Innovator in Semiconductor Technology

Introduction

Juurou Yasui is a notable inventor based in Toyonaka, Japan. He has made significant contributions to the field of semiconductor technology, particularly in the formation of semiconductor hetero interfaces. His innovative methods have the potential to enhance the performance of various electronic devices.

Latest Patents

Yasui holds a patent for a method of forming semiconductor hetero interfaces. This method involves cleaning and flattening the surface of a semiconductor substrate at an atomic level by heating it in a vacuum. Following this, a structural buffer layer is formed on the substrate surface, which is then subjected to thermal treatment. This process results in an ultra-smooth semiconductor interface, improving the performance of devices such as MOS transistors and quantum devices.

Career Highlights

Juurou Yasui is associated with Matsushita Electric Industrial Co., Ltd., where he has applied his expertise in semiconductor technology. His work has been instrumental in advancing the capabilities of electronic devices through innovative methods.

Collaborations

Yasui has collaborated with notable colleagues, including Masaharu Udagawa and Masaaki Niwa. These collaborations have contributed to the development of advanced semiconductor technologies.

Conclusion

Juurou Yasui's contributions to semiconductor technology through his innovative patent demonstrate his commitment to enhancing electronic device performance. His work continues to influence the field significantly.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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