Company Filing History:
Years Active: 2022-2024
Title: Junwen Liu: Innovator in Semiconductor Technology
Introduction
Junwen Liu is a prominent inventor based in Wuxi, China, known for his contributions to semiconductor technology. He holds a total of four patents, showcasing his expertise and innovative spirit in the field.
Latest Patents
One of his latest patents is a "Method for making high-voltage thick gate oxide." This method involves depositing a pad silicon oxide on a silicon substrate, followed by the deposition of a pad silicon nitride. The process includes shallow trench isolation photolithography, etching, silicon oxide filling, and chemical mechanical polishing. Liu's method also details the sequential deposition of a mask silicon nitride and a mask silicon oxide on a silicon wafer, leading to the production of a high-voltage thick gate oxide through thermal oxidation growth.
Another significant patent is the "Method for manufacturing logic device isolation in embedded storage process." This method focuses on removing the pad silicon nitride and floating gate polysilicon layer in a shallow trench isolation area while retaining the floating gate oxide layer. The process includes depositing acid etching silicon nitride and forming a trench, which is crucial for the isolation of logic devices in embedded storage.
Career Highlights
Junwen Liu has worked with notable companies in the semiconductor industry, including Hua Hong Semiconductor Limited and Shanghai Huahong Grace Semiconductor Manufacturing Corporation. His experience in these organizations has contributed to his development as an inventor and innovator.
Collaborations
Liu has collaborated with various professionals in his field, including his coworker Hualun Chen, which has further enriched his work and contributions to semiconductor technology.
Conclusion
Junwen Liu's innovative methods and patents in semiconductor technology highlight his significant role in advancing the industry. His work continues to influence the development of high-voltage thick gate oxides and logic device isolation processes.