Jun-feng Di

Title: Jun-feng Di: Innovator in IEEE1588 Protocol Testing

Introduction

Jun-feng Di is a notable inventor based in Xuchang, China. He has made significant contributions to the field of technology, particularly in the development of testing methods for the IEEE1588 protocol. His innovative approach has led to the creation of a unique negative testing method that enhances the reliability of time synchronization systems.

Latest Patents

Jun-feng Di holds a patent for the "IEEE1588 protocol negative testing method." This invention involves a series of steps that establish a real-time closed-loop feedback mechanism between an IEEE1588 tester and a slave clock device under test (DUT). The method includes taking the tester as a master clock, achieving stable time synchronization, and assessing the timing offset or path delay of the slave clock DUT before introducing disturbances. By sending abnormal messages to the slave clock DUT, the method effectively calculates the timing offset or path delay increment after disturbance. The test passes if there is no sudden change in the timing offset or path delay, ensuring that the slave clock DUT adheres to the IEEE1588 protocol.

Career Highlights

Throughout his career, Jun-feng Di has worked with prominent companies such as Xu Ji Group Corporation and State Grid Corporation of China. His experience in these organizations has allowed him to refine his skills and contribute to significant advancements in technology.

Collaborations

Jun-feng Di has collaborated with notable colleagues, including Yong Wei and Quan-sheng Cui. Their combined expertise has fostered an environment of innovation and progress in their respective fields.

Conclusion

Jun-feng Di's contributions to the IEEE1588 protocol testing method exemplify his dedication to advancing technology. His innovative spirit and collaborative efforts have positioned him as a key figure in the realm of time synchronization systems.