Nanjing, China

Jun-Cheng Liu

This inventor holds 1 USPTO granted patent and 3 published patent applications. Top assignees: Taiwan Semiconductor Manufacturing Comp. Ltd., TSMC Nanjing Company, Limited. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jun-Cheng Liu. Retrieved from https://idiyas.com/inventor/jun-cheng-liu-57bcxn4i

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 1 

Average Co-Inventor Count = 1.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Jun-Cheng Liu: Innovator in Integrated Circuit Technology

Introduction

Jun-Cheng Liu is an inventor based in Nanjing City, China. He is known for his contributions to the field of integrated circuit technology. Although he currently holds no granted patents, his innovative ideas are reflected in his latest patent applications.

Latest Patent Applications

Jun-Cheng Liu has filed several notable patent applications, including:

1. **INTEGRATED CIRCUIT DEVICE AND METHOD FOR FABRICATING THE SAME** - This application describes an integrated circuit device that includes a plurality of static random access memory (SRAM) cells, a first bit line, a capacitor, a write driver transistor, and a negative voltage generator circuit. The design focuses on optimizing the layout of the SRAM cells and the associated components to enhance performance.

2. **MEMORY DEVICE AND OPERATING METHOD THEREOF** - This application outlines a memory device that consists of at least one bit cell, a pair of transistors, and a voltage generation circuit. The voltage generation circuit is designed to pull down the voltage of data lines to a negative voltage level, thereby improving the efficiency of the memory device.

Conclusion

Jun-Cheng Liu is an emerging inventor in the field of integrated circuits, with innovative applications that showcase his technical expertise. His work has the potential to contribute significantly to advancements in memory technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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