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For the Inventor, By the Inventor

Holzkirchen, Germany

Juergen Dirks

This inventor holds 23 USPTO granted patents and 3 published patent applications, primarily in Integrated Circuit Design. Top assignees: Lsi Corporation, Lsi Logic Corporation, Avago Technologies General IP (Singapore) Pte. Ltd.. Active years: 2006-2014.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Juergen Dirks. Retrieved from https://idiyas.com/inventor/juergen-dirks

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 23 

% Patents Active = 21.7

Average Co-Inventor Count = 3.1

ph-index = 7

Forward Citations = 293(Granted Patents)


Location History:

  • Santa Clara, CA (US) (2006 - 2011)
  • Holzkirchen, DE (2006 - 2014)

Company Filing History:

goldMedal16 out of 2,353 
 
Lsi Corporation
 patents
silverMedal6 out of 3,715 
 
Lsi Logic Corporation
 patents
bronzeMedal1 out of 1,813 
 
Avago Technologies General IP (Singapore) Pte. Ltd.
 patents

Years Active: 2006-2014

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Areas of Expertise:
Timing Analysis
Integrated Circuit
Optimization Techniques
ASIC Testing
Flip-Flops
Clock Tree Insertion
Floorplan Layouts
Design Closure
DFT
Power Connection
Cell Builder
Engineering Change Orders
23 patents (USPTO):Explore Patents
1. 8863053 - Intelligent timing analysis and constraint generation GUI (2014-10-14),
2. 8584068 - Timing violation debugging inside place and route tool (2013-11-12),
3. 8572543 - Automation of tie cell insertion, optimization and replacement by scan flip-flops to increase fault coverage (2013-10-29),
4. 8564337 - Clock tree insertion delay independent interface (2013-10-22),
5. 8539407 - Intelligent timing analysis and constraint generation GUI (2013-09-17),
6. 8332801 - Special engineering change order cells (2012-12-11),
7. 8219959 - Generating integrated circuit floorplan layouts (2012-07-10),
8. 8161447 - Automation of tie cell insertion, optimization and replacement by scan flip-flops to increase fault coverage (2012-04-17),
9. 7975197 - On-chip scan clock generator for ASIC testing (2011-07-05),
10. 7958473 - Method and computer program for configuring an integrated circuit design for static timing analysis (2011-06-07),
11. 7747975 - Timing violation debugging inside place and route tool (2010-06-29),
12. 7634748 - Special engineering change order cells (2009-12-15),
13. 7546568 - Automation of tie cell insertion, optimization and replacement by scan flip-flops to increase fault coverage (2009-06-09),
14. 7546560 - Optimization of flip flop initialization structures with respect to design size and design closure effort from RTL to netlist (2009-06-09),
15. 7523426 - Intelligent timing analysis and constraint generation GUI (2009-04-21),

Title: Innovations and Achievements of Juergen Dirks

Introduction

Juergen Dirks, an accomplished inventor based in Holzkirchen, Germany, is known for his significant contributions to the field of circuit design. With a remarkable portfolio of 23 patents, he has made substantial advancements that enhance the efficiency and functionality of electronic systems.

Latest Patents

Among his latest innovations, two prominent patents stand out. The first, titled "Intelligent Timing Analysis and Constraint Generation GUI," introduces a comprehensive system that includes a clock structure analysis tool, a static timing analysis tool, and a waveform tool. This invention allows for the generation of a simplified clock structure for circuit designs, providing crucial analysis results for intermediate signals.

The second recent patent, "Timing Violation Debugging Inside Place and Route Tool," is a software tool designed for circuit development. It facilitates the identification of specific cells within a circuit design that have timing characteristics. By providing a process to replace cells with suitable alternatives, this tool streamlines the engineering change orders, thereby improving circuit design efficiency and accuracy.

Career Highlights

Throughout his career, Juergen Dirks has held positions in esteemed companies such as LSI Corporation and LSI Logic Corporation. His work in these organizations has been instrumental in pushing the boundaries of circuit design technology and innovation. His expertise has not only benefited the companies he worked with but has also contributed significantly to the wider field of electronics.

Collaborations

During his impressive career, Juergen has collaborated with notable professionals, including Matthias Dinter and Herbert Johannes Preuthen. These partnerships have fostered an exchange of ideas and led to the development of groundbreaking technologies that continue to impact the electronics industry.

Conclusion

Juergen Dirks' extensive portfolio of patents and his impactful career highlight his role as a prominent inventor in the field of circuit design. His contributions, characterized by innovative tools and methodologies, have paved the way for advancements that enhance electronic systems. With a strong focus on improving efficiency and accuracy in circuit design, Dirks remains a pivotal figure in the continuing evolution of technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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