Judith Prybyla

Title: Judith Prybyla: Innovator in Semiconductor Technology

Introduction

Judith Prybyla is a notable inventor based in Edison, NJ (US). She has made significant contributions to the field of semiconductor technology, particularly through her innovative processes that enhance the manufacturing of semiconductor wafers.

Latest Patents

Judith Prybyla holds 1 patent for her invention titled "Process for planarization a semiconductor substrate." This patent describes a method for forming a semiconductor wafer with a flat surface. The process involves providing a bare semiconductor wafer that has been sawed from an ingot. A layer of planarization material is formed on at least one major surface of the semiconductor wafer. This layer is then placed into contact with an object having a flat surface. Pressure is applied to cause the planarization material to flow, imparting a planar surface to the layer. After hardening the planarization material, the flat surface is separated from the hardened layer, transferring the surface flatness into the underlying substrate surface.

Career Highlights

Judith has worked with Agere Systems Guardian Corp., where she has applied her expertise in semiconductor technology. Her work has been instrumental in advancing the processes used in the semiconductor industry.

Collaborations

One of her notable coworkers is Richard Alden DeFelice, with whom she has likely collaborated on various projects within the semiconductor field.

Conclusion

Judith Prybyla's contributions to semiconductor technology through her innovative patent demonstrate her significant role in the industry. Her work continues to influence the development of advanced semiconductor manufacturing processes.