Portland, OR, United States of America

Jourdan J Stephan

This inventor holds 1 USPTO granted patent. Top assignee: Intel Corporation. Active years: 2009.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jourdan J Stephan. Retrieved from https://idiyas.com/inventor/jourdan-j-stephan

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

Average Co-Inventor Count = 2.0

ph-index = 1

Forward Citations = 18(Granted Patents)


Company Filing History:


Years Active: 2009

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1 patent (USPTO):Explore Patents

Title: Jourdan J Stephan: Innovator in High-Performance Processors

Introduction

Jourdan J Stephan is a notable inventor based in Portland, OR (US). He has made significant contributions to the field of high-performance processors, showcasing his expertise through his innovative patent.

Latest Patents

Jourdan holds a patent titled "Apparatus having a micro-instruction queue, a micro-instruction pointer programmable logic array and a micro-operation read only memory and method for use thereof." This invention relates to high-performance processors, specifically focusing on the storage of all operation information associated with each instruction in a single memory. The processor design includes multiple programmable logic arrays (PLAs), an instruction pointer queue, and a micro-operation cache, among other components.

Career Highlights

Jourdan is currently employed at Intel Corporation, where he continues to push the boundaries of technology and innovation. His work has been instrumental in advancing the capabilities of processors, making them more efficient and powerful.

Collaborations

One of his notable coworkers is Rebecca E Hebda, with whom he collaborates on various projects within the company.

Conclusion

Jourdan J Stephan's contributions to high-performance processors exemplify his innovative spirit and dedication to advancing technology. His patent reflects a significant step forward in processor design, showcasing his expertise in the field.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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