Company Filing History:
Years Active: 2011-2012
Title: Innovations of Joseph T. Buck
Introduction
Joseph T. Buck is an accomplished inventor based in Campbell, CA (US). He has made significant contributions to the field of digital circuit design, holding a total of 3 patents. His work primarily focuses on methods and systems that enhance the efficiency and accuracy of hardware design simulations.
Latest Patents
One of his latest patents is titled "Method for modeling an HDL design using symbolic simulation." This innovative method provides a structured approach to digital circuit design by utilizing hardware definition language. The process involves generating a binary simulation of the design, which includes defining control and program states for each unit of time during execution. Ultimately, it captures the combinational logic expression of the simulation output and the next state functions.
Another notable patent is "Method and apparatus for simulating behavioral constructs using indeterminate values." This invention allows for the simulation of behavioral constructs in register transfer level designs by accommodating indeterminate values. The system can execute multiple alternatives based on the value of an expression, thereby reducing discrepancies between register transfer level simulations and gate level simulations.
Career Highlights
Joseph T. Buck is currently employed at Synopsys, Inc., where he continues to innovate in the field of digital design. His expertise in hardware description languages and simulation techniques has positioned him as a valuable asset in the industry.
Collaborations
Throughout his career, Joseph has collaborated with notable colleagues, including Guillermo R. Maturana and Arturo Salz. These partnerships have contributed to the advancement of technology in digital circuit design.
Conclusion
Joseph T. Buck's contributions to digital circuit design through his patents and work at Synopsys, Inc. highlight his role as a leading inventor in the field. His innovative methods continue to shape the future of hardware design and simulation.