Germantown, MD, United States of America

Joseph G Pawletko

This inventor holds 11 USPTO granted patents. Top assignee: Advanced Micro Devices Corporation. Active years: 1994-2003.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Joseph G Pawletko. Retrieved from https://idiyas.com/inventor/joseph-g-pawletko

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 3.3

ph-index = 8

Forward Citations = 351(Granted Patents)


Location History:

  • Sunnyvale, CA (US) (1994)
  • Santa Clara, CA (US) (2001)
  • Germantown, MD (US) (2000 - 2003)
  • New York, NY (US) (2003)

Company Filing History:


Years Active: 1994-2003

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11 patents (USPTO):Explore Patents

Title: Joseph G. Pawletko: Innovator in Memory Technology

Introduction

Joseph G. Pawletko is a prominent inventor based in Germantown, MD (US), known for his significant contributions to memory technology. With a total of 11 patents to his name, he has made remarkable advancements in the field of semiconductor memory devices. His work primarily focuses on improving the performance and reliability of memory transistors.

Latest Patents

Among his latest patents, one notable invention is the "Erase verify mode to evaluate negative Vt's." This method provides a way to determine erase threshold voltages of memory transistors, allowing for the identification of unusable memory transistors. The process involves applying a voltage to the common source of a selected memory transistor and incrementally adjusting it until a logical HIGH bit is read as a logical LOW bit. By iteratively incrementing the voltage, the erase threshold voltage for each memory transistor can be accurately determined. Additionally, the memory device undergoes stress tests to simulate normal operating conditions, enabling the assessment of data retention characteristics.

Another significant patent is the "Method and apparatus for adjusting on-chip current reference for EEPROM sensing." This invention describes a memory circuit that includes a sense amplifier connected to read the data content output of a memory cell. The sense amplifier circuit features a current source transistor that adjusts the source current to account for variations in performance parameters, ensuring reliable memory operation.

Career Highlights

Joseph G. Pawletko is currently employed at Advanced Micro Devices Corporation, where he continues to innovate in the field of memory technology. His expertise and dedication have made him a valuable asset to the company and the industry as a whole.

Collaborations

Throughout his career, Joseph has collaborated with notable colleagues, including Shane Charles Hollmer and Pau-Ling Chen. These partnerships have contributed to the advancement of memory technology and the successful development of innovative solutions.

Conclusion

Joseph G. Pawletko's contributions to memory technology through his patents and work at Advanced Micro Devices Corporation highlight his role as a leading inventor in the field. His innovative methods and collaborative efforts continue to shape the future of semiconductor memory devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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