Austin, TX, United States of America

Jose Angel Paredes

This inventor holds 34 USPTO granted patents and 2 published patent applications, primarily in Memory Circuit Design. Top assignee: International Business Machines Corporation. Active years: 2001-2019.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jose Angel Paredes. Retrieved from https://idiyas.com/inventor/jose-angel-paredes

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 34 

% Patents Active = 44.1

Average Co-Inventor Count = 3.6

ph-index = 8

Forward Citations = 168(Granted Patents)


Company Filing History:


Years Active: 2001-2019

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Areas of Expertise:
ECC Mechanism
Memory Array
Register File
Dynamic Circuit
Multi-Slice Processor
Transient Noise Detection
Instruction Retry Recovery
Selective Row Energization
Radiation Resistant Latch
Bit-Read Method
Sub-Threshold Leakage
Content Addressable Memory
34 patents (USPTO):Explore Patents

Title: Innovations of Jose Angel Paredes in Advanced Computing

Introduction

Jose Angel Paredes is an accomplished inventor based in Austin, TX, with an impressive portfolio of 34 patents. His innovative contributions primarily focus on enhancing memory systems within computing architectures. Paredes' expertise is invaluable in the domain of partial writes into memory elements, improving how processors manage data efficiently.

Latest Patents

Among his latest patents, Paredes has developed a "Partial ECC mechanism for a byte-write capable register." This innovation allows a computing system to perform partial writes into a memory element, such as a register on a processor. The technology supports data being sourced from multiple origins, thus enabling the register to execute separate partial write commands. During these operations, the system generates Error Correction Code (ECC) values for each partial write, ensuring data integrity. This mechanism is critical for maintaining reliable data storage and retrieval in modern computing systems.

Another notable patent by Paredes is the "Generating ECC values for byte-write capable registers." This invention embodies a similar approach, enhancing the capability of computing systems to handle data from different sources efficiently while generating ECC values to maintain error-free data storage.

Career Highlights

Paredes currently works at International Business Machines Corporation (IBM), where he has made significant advancements in memory management technologies. His contributions have positioned him as a leader in his field, and his patents reflect a strong commitment to driving innovation in computing.

Collaborations

Throughout his career, Paredes has collaborated with talented colleagues, including Sam Gat-Shang Chu and Peter Juergen Klim. Together, they have explored complex challenges in computing systems, enabling breakthroughs that enhance performance and reliability.

Conclusion

With 34 patents to his name and continuous contributions to the field of advanced computing, Jose Angel Paredes stands out as a leading inventor. His work on partial write mechanisms and ECC values not only reflects innovation but also significantly improves data management in processors. As technology advances, Paredes' contributions will undoubtedly continue to shape the future of computing.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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