IDiyas

For the Inventor, By the Inventor

Daly City, CA, United States of America

Jorge Pernillo

USPTO Granted Patents = 13 

Average Co-Inventor Count = 4.1

ph-index = 4

Forward Citations = 63(Granted Patents)


Location History:

  • Santa Clara, CA (US) (2017 - 2018)
  • Daly City, CA (US) (2005 - 2023)

Company Filing History:

goldMedal10 out of 534 
 
Inphi Corporation
 patents
silverMedal2 out of 1,123 
 
Marvell Asia Pte., Ltd.
 patents
bronzeMedal1 out of 4,667 
 
Agilent Technologies, Inc.
 patents

Years Active: 2005-2023

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13 patents (USPTO):
1. 11728817 - Clock and data recovery devices with fractional-N PLL (2023-08-15),
2. 11218156 - Clock and data recovery devices with fractional-N PLL (2022-01-04),
3. 10886692 - CMOS externally modulated laser driver (2021-01-05),
4. 10804913 - Clock and data recovery devices with fractional-N PLL (2020-10-13),
5. 10574023 - CMOS externally modulated laser driver (2020-02-25),
6. 10148357 - Configurable laser modulator driver and output matching network (2018-12-04),
7. 10096964 - CMOS externally modulated laser driver (2018-10-09),
8. 9866231 - Interleaved successive approximation register analog to digital converter (2018-01-09),
9. 9722621 - Systems and methods for comparator calibration (2017-08-01),
10. 9602116 - Interleaved successive approximation register analog to digital converter (2017-03-21),
11. 9548754 - Systems and methods for comparator calibration (2017-01-17),
12. 9356615 - Systems and methods for comparator calibration (2016-05-31),
13. 6909310 - CMOS controlled-impedance transmission line driver (2005-06-21),

Title: Innovations by Jorge Pernillo

Introduction

Jorge Pernillo is a notable inventor based in Daly City, CA (US). He has made significant contributions to the field of data communication and electrical circuits. With a total of 13 patents to his name, Pernillo has demonstrated a strong commitment to innovation and technological advancement.

Latest Patents

One of his latest patents is focused on clock and data recovery devices with fractional-N PLL. This invention relates to data communication and electrical circuits, specifically providing a clock and data recovery (CDR) architecture implementation for high data rate wireline communication links. In this embodiment, a CDR device includes a phase detector, a loop filter, and a fractional-N PLL. The fractional-N PLL generates an output clock signal based on the output of the loop filter. There are other embodiments as well that further enhance the functionality of this technology.

Career Highlights

Throughout his career, Jorge Pernillo has worked with prominent companies such as Inphi Corporation and Marvell Asia Pte., Ltd. His experience in these organizations has allowed him to refine his skills and contribute to various innovative projects.

Collaborations

Some of his notable coworkers include Karthik S Gopalakrishnan and Michael Q Le. Their collaboration has likely fostered an environment of creativity and innovation, leading to the development of groundbreaking technologies.

Conclusion

Jorge Pernillo's work in the field of data communication and electrical circuits showcases his dedication to innovation. His numerous patents and collaborations highlight his impact on the industry and his role as a leading inventor.

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