Palo Alto, CA, United States of America

Joost J Vlassak

This inventor holds 2 USPTO granted patents. Top assignee: National Semiconductor Corporation. Active years: 2001.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Joost J Vlassak. Retrieved from https://idiyas.com/inventor/joost-j-vlassak

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 1.5

ph-index = 2

Forward Citations = 8(Granted Patents)


Company Filing History:


Years Active: 2001

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2 patents (USPTO):Explore Patents

Title: Joost J Vlassak: Innovator in Semiconductor Technology

Introduction

Joost J Vlassak is a prominent inventor based in Palo Alto, CA, known for his contributions to semiconductor technology. He holds 2 patents that focus on innovative methods for improving the manufacturing processes of integrated circuits. His work has significantly impacted the field, particularly in the area of metallic interconnect lines.

Latest Patents

Vlassak's latest patents include a "Method for manufacturing low stress metallic interconnect lines for use in integrated circuits." This patent describes a process that begins with a semiconductor substrate, such as a silicon wafer, which is covered by an insulating layer. The process involves forming a multi-layer stack that includes a metal layer and a material layer that can create an electrically conductive intermetallic layer or solid solution layer when subjected to thermal treatment. This innovative method results in low stress metallic interconnect lines, enhancing the performance and reliability of integrated circuits.

Another significant patent is the "Method of wafer temperature measurement." This invention provides a technique for determining the temperature of a wafer during processing by using a specially prepared test wafer and a calibration chart. The difference in stack sheet resistance before and after processing is plotted to ascertain the wafer's temperature, which is crucial for optimizing manufacturing conditions.

Career Highlights

Joost J Vlassak is currently associated with National Semiconductor Corporation, where he continues to advance semiconductor technologies. His expertise in the field has made him a valuable asset to the company and the industry as a whole.

Collaborations

Throughout his career, Vlassak has collaborated with notable colleagues, including Kevin Carl Brown and Vassili M Kitch. These collaborations have fostered innovation and contributed to the development of cutting-edge technologies in semiconductor manufacturing.

Conclusion

Joost J Vlassak's contributions to semiconductor technology through his patents and work at National Semiconductor Corporation highlight his role as an influential inventor in the field. His innovative methods for manufacturing low stress metallic interconnect lines and wafer temperature measurement continue to shape the future of integrated circuits.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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