Sunnyvale, CA, United States of America

Jonathan Kluth

This inventor holds 1 USPTO granted patent. Top assignee: Advanced Micro Devices Corporation. Active years: 2002.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jonathan Kluth. Retrieved from https://idiyas.com/inventor/jonathan-kluth

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 15(Granted Patents)


Company Filing History:


Years Active: 2002

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1 patent (USPTO):Explore Patents

Title: Innovations of Jonathan Kluth

Introduction

Jonathan Kluth is an accomplished inventor based in Sunnyvale, CA. He has made significant contributions to the field of semiconductor technology. His work primarily focuses on enhancing the performance of ultra-thin-body SOI MOS transistors.

Latest Patents

Jonathan holds a patent for a source/drain doping technique for ultra-thin-body SOI MOS transistors. This innovative approach involves an ultra-large-scale integrated (ULSI) circuit that includes MOSFETs on an SOI substrate. The MOSFETs feature elevated source and drain regions that are amorphized before doping. Notably, neutral ion species can be utilized to amorphize these elevated regions. The activation of dopants occurs through a low-temperature rapid thermal anneal process. He has 1 patent to his name.

Career Highlights

Jonathan is currently employed at Advanced Micro Devices Corporation, a leading company in the semiconductor industry. His expertise in semiconductor technology has positioned him as a valuable asset to his team.

Collaborations

Throughout his career, Jonathan has collaborated with talented individuals such as Bin Yu and Emi Ishida. Their combined efforts have contributed to advancements in semiconductor technology.

Conclusion

Jonathan Kluth's innovative work in semiconductor technology exemplifies the impact of dedicated inventors in the field. His contributions continue to shape the future of ultra-thin-body SOI MOS transistors.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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