This inventor holds 4 USPTO granted patents. Top assignee: Micron Technology Incorporated. Active years: 2003-2006.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2003-2006
Title: Jon Morris: Semiconductor Memory and Standby Power Reduction
Introduction
Jon Morris is an inventor based in Plano, Texas, with 4 patents. His patent work includes semiconductor memory technology and methods for reducing standby power in semiconductor devices. He is associated with Micron Technology Incorporated.
Latest Patents
Morris’s listed patent, “Method and Apparatus for Standby Power Reduction in Semiconductor Devices,” concerns a word-line driver circuit for semiconductor memory. The design reduces standby leakage by maintaining a local supply node below the global power-supply voltage when the circuit is not driving a word line.
In one embodiment, a decoupling transistor and a threshold-voltage-connected transistor help regulate the local supply node while the decoupling transistor is off. Before word-line operation begins, the decoupling transistor switches on, allowing the local node to rise to the global supply voltage. The approach uses control signals that may also serve purposes beyond controlling the decoupling transistor.
Career Highlights
Morris’s listed invention addresses power consumption in semiconductor memory circuits, with a focus on limiting gate-induced diode leakage during standby conditions. His work is associated with Micron Technology Incorporated, a company known for semiconductor and memory products.
Collaborations
Rishad Omer and John Frederic Schreck are identified as Morris’s coworkers. The supplied information does not specify their roles in the patent or whether they collaborated with him on this invention.
Conclusion
Jon Morris’s patent work focuses on reducing standby power in semiconductor memory through supply-node control, reflecting an engineering approach to improving circuit efficiency.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
