John Prakash Niroula

Title: John Prakash Niroula: III-N Transistor Innovation

Introduction

John Prakash Niroula is an inventor based in Los Angeles, California, and is associated with the Massachusetts Institute of Technology. His work includes a patent concerning transistor structures and fabrication methods for III-N devices.

Latest Patents

Niroula is named on 1 patent: “Transistor Structure and Methods of Forming the Same.” The patent describes an epitaxial design and transistor platform for III-N transistors and chips that incorporates a conductive metal layer on the backside. This layer may function as a back gate, a field plate, or an electrode for delivering power to devices and circuits, including through a backside power delivery network. The patent also describes methods for preparing and fabricating the epitaxial structure and transistor platform.

Career Highlights

Niroula’s patent work addresses transistor architecture and fabrication, with a focus on integrating backside metal into III-N devices. The proposed design brings together potential control, field-management, and power-delivery functions in a single platform.

Collaborations

The patent lists Tomás A. Palacios and Qingyun Xie among Niroula’s coworkers. Their shared work reflects collaboration on semiconductor devices and transistor technologies.

Conclusion

John Prakash Niroula’s patent describes a versatile backside-metal approach for III-N transistors, combining possible back-gate, field-plate, and power-delivery functions.