John P Dunn

This inventor holds 8 USPTO granted patents. Top assignees: Motorola Corporation, Gm Global Technolgoy Operations, Inc.. Active years: 1991-1999.

IDiyas Innovation Intelligence. (2026). Inventor Profile: John P Dunn. Retrieved from https://idiyas.com/inventor/john-p-dunn-ozqq24b7

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 8

% Patents Active = 100.0

Average Co-Inventor Count = 3.6

ph-index = 5

Forward Citations = 99(Granted Patents)

Company Filing History:

Gm Global Technolgoy Operations, Inc.

patents

where one patent can have more than one assignee

Years Active: 1991-1999

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8 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 5901103 - Integrated circuit having standby control for memory and method thereof (1999-05-04),

2. 5867719 - Method and apparatus for testing on-chip memory on a microcontroller (1999-02-02),

3. 5826047 - Method and apparatus for external viewing of an internal bus (1998-10-20),

4. 5361392 - Digital computing system with low power mode and special bus cycle (1994-11-01),

5. 5170475 - Data processor having instructions for interpolating between (1992-12-08),

6. 5119325 - Multiplier having a reduced number of partial product calculations (1992-06-02),

7. 5072365 - Direct memory access controller using prioritized interrupts for varying (1991-12-10),

8. 5051943 - Adder circuit with an encoded carry (1991-09-24),

Title: The Innovations of John P Dunn

Introduction

John P Dunn is a notable inventor based in Austin, TX, with a remarkable portfolio of eight patents. His work primarily focuses on advancements in integrated circuits and memory testing methods, contributing significantly to the field of microelectronics.

Latest Patents

One of his latest patents is titled "Integrated circuit having standby control for memory and method thereof." This invention features an integrated circuit that includes a central processing unit (CPU) and multiple memory blocks. It utilizes power control switches to dynamically select voltage supply signals for the memory blocks, allowing for efficient power management. The intelligent controller in this design can adjust power levels based on data access patterns, ensuring that only necessary memory banks are activated at high power while others remain in low power standby mode.

Another significant patent is the "Method and apparatus for testing on-chip memory on a microcontroller." This invention introduces a method for soft defect detection testing (SDDT) of memory arrays in data processors. It involves a control value that determines the power supply voltage applied to selected portions of the memory array, enabling effective testing while minimizing power consumption.

Career Highlights

Throughout his career, John P Dunn has worked with prominent companies such as Motorola Corporation and General Motors Global Technology Operations. His contributions in these organizations have helped shape the landscape of microcontroller technology and memory management.

Collaborations

John has collaborated with several professionals in his field, including Joseph M Harris, II and Theo C Freund. These partnerships have fostered innovation and development in his projects.

Conclusion

John P Dunn's contributions to integrated circuit technology and memory testing methods highlight his significant impact on the field of electronics. His innovative patents and collaborations reflect a commitment to advancing technology and improving efficiency in microelectronics.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]