The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 10, 1991

Filed:

Dec. 27, 1989
Applicant:
Inventors:

Bradley G Burgess, Austin, TX (US);

James B Eifert, Austin, TX (US);

John P Dunn, Austin, TX (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395725 ; 3642405 ; 3642407 ; 3642414 ; 3642415 ; 36424231 ; 364D / ;
Abstract

A data processing system having a direct memory access controller (DMAC) which can be interrupted with a prioritized signal to vary bus mastership of a communication bus in the system. A prioritized interrupt signal is sent to a CPU when the DMAC has bus mastership. The CPU only informs the DMAC of the highest priority cumulative interrupt priority. With the use of a mask value, the interrupt may be selectively screened by the DMAC so that selective interrupts may remove bus mastership from the DMAC.


Find Patent Forward Citations

Burgess, Bradley. (1991). Direct memory access controller using prioritized interrupts for varying (U.S. Patent No. 5072365). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5072365

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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