Los Angeles, CA, United States of America

John Damoulakis

This inventor holds 1 USPTO granted patent. Top assignee: University of Southern California. Active years: 2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: John Damoulakis. Retrieved from https://idiyas.com/inventor/john-damoulakis

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 5.0

ph-index = 1


Company Filing History:


Years Active: 2025

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1 patent (USPTO):Explore Patents

Title: John Damoulakis: Innovator in Microelectronics Manufacturing

Introduction

John Damoulakis is a prominent inventor based in Los Angeles, CA. He has made significant contributions to the field of microelectronics manufacturing. His innovative techniques focus on ensuring the integrity of integrated circuits against malicious modifications.

Latest Patents

One of his notable patents is titled "ML-enabled assured microelectronics manufacturing: a technique to mitigate hardware trojan detection." This patent presents a method for assuring that integrated circuits are free of malicious circuit insertions and/or IC design modifications through mask swapping and addition. The method includes a step of comparing 3D tomographic images constructed from design GDS to the 3D tomographic images constructed from in-line fab metrology data. This innovative approach enhances the security and reliability of microelectronics.

Career Highlights

John Damoulakis is affiliated with the University of Southern California, where he continues to advance research in microelectronics. His work has garnered attention for its potential to revolutionize the manufacturing process of integrated circuits.

Collaborations

He has collaborated with notable colleagues, including Devanand Krishna Shenoy and Ajey Poovannummoottil Jacob, contributing to various research initiatives in the field.

Conclusion

John Damoulakis stands out as an influential inventor in the realm of microelectronics manufacturing. His innovative patent addresses critical security concerns in integrated circuit design, showcasing his commitment to advancing technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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