Jiunn-Chin Tseng

Title: Innovations of Jiunn-Chin Tseng

Introduction

Jiunn-Chin Tseng is a notable inventor based in Tainan, Taiwan. He has made significant contributions to the field of semiconductor technology, holding 2 patents that showcase his innovative approach to solving complex engineering challenges.

Latest Patents

One of his latest patents is titled "Method and apparatus of an output buffer for controlling the ground." This invention provides a method and apparatus for controlling ground bounce and power supply noise during output switching. The CMOS output buffer includes a P-channel output transistor, an N-channel output transistor, and a predrive circuit. The predrive circuit generates specific gate voltages during output transitions, which helps to improve ground bounce while maintaining speed performance.

Another significant patent is the "Bias scheme to reduce burn-in test time for semiconductor memory." This invention describes a biasing scheme that minimizes burn-in testing time and the number of cycles required for semiconductor memory devices. By adjusting the substrate back bias during the burn-in process, the invention allows for higher external voltage stress without causing breakdown, ultimately leading to a more efficient testing process.

Career Highlights

Jiunn-Chin Tseng is currently employed at Vanguard International Semiconductor Corporation, where he continues to develop innovative solutions in semiconductor technology. His work has had a substantial impact on the efficiency and reliability of semiconductor devices.

Collaborations

He has collaborated with notable coworkers such as Hon Shing Lau and Howard Clayton Kirsch, contributing to a dynamic team focused on advancing semiconductor technology.

Conclusion

Jiunn-Chin Tseng's contributions to the field of semiconductor technology through his patents reflect his innovative spirit and dedication to improving device performance. His work continues to influence the industry and pave the way for future advancements.