The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 26, 2000
Filed:
Nov. 10, 1998
Jiunn-Chin Tseng, Tainan, TW;
Howard Clayton Kirsch, Taoyuan, TW;
Vanguard International Semiconductor Corporation, Hsinchu, TW;
Abstract
A method and apparatus of an output buffer for controlling the ground bounce and power supply noise during output switching is provided. A CMOS output buffer comprises a P-channel output transistor, a N-channel output transistor and a predrive circuit. During output pull-down transition, the predrive circuit generates a first gate voltage on the pull-down N-channel output transistor for a predetermined time, and further generates a second voltage value which is smaller than the first voltage value, then returns to the first voltage value after the elapse of the predetermined time. The predrive circuit makes the pull-down N-channel output transistor stay in the saturation region longer than the uncontrolled scheme, the steep rising gate voltage on the N-channel output transistor can be avoided with a very little speed degradation but instead of better ground bounce improvement. During output pull-up transition, the predrive circuit generates a first gate voltage on the pull-up P-channel output transistor for a predetermined time, and further generates a second voltage which is higher than the first voltage value, then returns back to the first voltage value after the elapse of the predetermined time.