Chandler, AZ, United States of America

Jieying Jiao

This inventor holds 1 USPTO granted patent and 1 published patent application. Top assignee: Fujifilm Electronic Materials U.s.a., Inc.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jieying Jiao. Retrieved from https://idiyas.com/inventor/jieying-jiao-9vyerpi2

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 1 

Average Co-Inventor Count = 1.0


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Jieying Jiao: Innovator in Semiconductor Cleaning Compositions

Introduction: Jieying Jiao is a notable inventor based in Chandler, AZ, specializing in cleaning compositions for semiconductor substrates. With a focus on enhancing the efficiency of cleaning methods, her work contributes significantly to the semiconductor industry.

Latest Patents: Jieying Jiao holds 1 patent related to cleaning compositions. This patent addresses compositions designed for cleaning post-etching residues on semiconductor substrates, along with the associated cleaning methods. Her innovative approach aids in maintaining the integrity and performance of semiconductor devices.

Career Highlights: Jieying Jiao is currently employed at Fujifilm Electronic Materials U.S.A., Inc., where she applies her expertise in materials science to develop advanced cleaning solutions. Her contributions to the field have been recognized for their impact on semiconductor manufacturing processes.

Collaborations: Jieying collaborates with Thomas Dory, a fellow innovator in the field. Together, they work on projects that aim to improve cleaning techniques and materials used in semiconductor production.

Conclusion: Jieying Jiao's work in cleaning compositions showcases her commitment to innovation in the semiconductor industry. Her contributions are vital for advancing cleaning methods and enhancing the performance of semiconductor devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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