Icheon, South Korea

Jieun Lee

This inventor holds 1 USPTO granted patent. Top assignees: Sk Enpulse Co., Ltd., Skhynix Inc.. Active years: 2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jieun Lee. Retrieved from https://idiyas.com/inventor/jieun-lee-2s4akc4d

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 5.0

ph-index = 1


Company Filing History:


Years Active: 2025

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1 patent (USPTO):Explore Patents

Title: Jieun Lee - Innovator in Semiconductor Polishing Technology

Introduction

Jieun Lee is a notable inventor based in Icheon-si, South Korea. He has made significant contributions to the field of semiconductor processing, particularly through his innovative polishing compositions. His work is essential for the advancement of microcircuit pattern formation, which is crucial in modern electronics.

Latest Patents

Jieun Lee holds a patent for a "Polishing composition for semiconductor process and manufacturing method for polished article." This invention facilitates the formation of microcircuit patterns while minimizing defects and scratches. The polishing composition is designed to maintain a specific absorbance ratio of particles, ensuring optimal performance in semiconductor applications. He has 1 patent to his name.

Career Highlights

Throughout his career, Jieun Lee has worked with prominent companies in the semiconductor industry. Notably, he has been associated with SK Enpulse Co., Ltd. and SK Hynix Inc. His experience in these organizations has allowed him to develop and refine his innovative ideas in semiconductor technology.

Collaborations

Jieun Lee has collaborated with several professionals in his field, including Seung Chul Hong and Deok Su Han. These collaborations have contributed to the successful development of his patented technologies.

Conclusion

Jieun Lee's contributions to semiconductor polishing technology highlight his role as an innovator in the industry. His patent reflects his commitment to enhancing the efficiency and quality of semiconductor processes.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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