Rosebery, Australia

Jie Cui

This inventor holds 1 USPTO granted patent. Top assignee: Newsouth Innovations Pty Limited. Active years: 2017.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jie Cui. Retrieved from https://idiyas.com/inventor/jie-cui-0skekhrr

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 2.0

ph-index = 1


Company Filing History:


Years Active: 2017

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1 patent (USPTO):Explore Patents

Title: Jie Cui - Innovator in Semiconductor Technology

Introduction

Jie Cui is a prominent inventor based in Rosebury, Australia. He has made significant contributions to the field of semiconductor technology, particularly through his innovative methods of anodizing semiconductor surfaces.

Latest Patents

Jie Cui holds a patent for a method of anodizing a surface of a semiconductor device. This patent, which is particularly relevant for devices comprising a p-n junction, outlines a process that involves exposing a first surface portion of the semiconductor device to an electrolytic solution. This occurs when an electrical current is directed through a region at the first surface portion. Additionally, the method includes the exposure of the semiconductor device to electromagnetic radiation, which induces the electrical current necessary for anodization.

Career Highlights

Cui's career is marked by his work at Newsouth Innovations Pty Limited, where he has been instrumental in advancing semiconductor technologies. His innovative approach has led to the development of methods that enhance the performance and efficiency of semiconductor devices.

Collaborations

Jie Cui collaborates with Xi Wang, a fellow innovator in the field. Their partnership exemplifies the collaborative spirit that drives innovation in technology.

Conclusion

Jie Cui's contributions to semiconductor technology through his patented methods demonstrate his commitment to innovation. His work continues to influence the industry and pave the way for future advancements in semiconductor devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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