Jian-Cheng Lin

Title: Jian-Cheng Lin: Innovator in Circuit Design Debugging

Introduction

Jian-Cheng Lin is a notable inventor based in Yunlin, Taiwan. He has made significant contributions to the field of circuit design, particularly in debugging methodologies. With a total of 2 patents, his work has advanced the efficiency and effectiveness of testbench code debugging.

Latest Patents

Jian-Cheng Lin's latest patents include a method for recording and replaying call frames for a testbench. This computer-implemented method aids in debugging testbench code associated with circuit designs. By recording a trace of call frames along with the activities of the circuit design, users can easily trace the execution history of subroutines executed by the testbench. This method also allows users to trace the source code of the testbench code using the recorded trace of call frames. Furthermore, it enables debugging through virtual simulation, utilizing post-processed records stored in a database.

Career Highlights

Throughout his career, Jian-Cheng Lin has worked with prominent companies such as Synopsys, Inc. and Synopsys Taiwan Co., Ltd. His experience in these organizations has contributed to his expertise in circuit design and debugging techniques.

Collaborations

Some of his notable coworkers include Chia-Ling Ho and Jencheng Wang. Their collaboration has likely fostered innovation and development in their respective fields.

Conclusion

Jian-Cheng Lin's contributions to circuit design debugging through his innovative patents and career experiences highlight his role as a significant inventor in the technology sector. His work continues to influence the methodologies used in circuit design today.