Jia-Sheng Wu

Title: Innovations by Jia-Sheng Wu in Semiconductor Technology

Introduction

Jia-Sheng Wu is a notable inventor based in Taoyuan, Taiwan. He has made significant contributions to the field of semiconductor technology, particularly in the area of hard mask pattern control. His innovative methods have implications for the manufacturing processes in the semiconductor industry.

Latest Patents

Jia-Sheng Wu holds a patent titled "Method to control critical dimension of a hard masked pattern." This patent describes a method of reducing the critical dimension (CD) of a hard mask using a wet etch method. The process involves treating an oxide hard mask with a HSO/HO(SPM) solution, followed by treatment with a NHOH/HO/HO (APM) solution to trim the CD by 0 to 20 nm. The method is designed to enhance precision in semiconductor fabrication, allowing for gate lengths of less than 150 nm while controlling the CD to within 3 to 5 nm of a targeted value.

Career Highlights

Jia-Sheng Wu is currently employed at Taiwan Semiconductor Manufacturing Company Limited, where he applies his expertise in semiconductor manufacturing. His work focuses on improving the efficiency and accuracy of etching processes, which are critical in the production of advanced semiconductor devices.

Collaborations

Throughout his career, Jia-Sheng Wu has collaborated with esteemed colleagues such as Chao-Tzung Tsai and Fuxuan Fang. These collaborations have contributed to the advancement of technologies in the semiconductor sector.

Conclusion

Jia-Sheng Wu's innovative methods in controlling critical dimensions in semiconductor manufacturing highlight his significant role in the industry. His contributions continue to influence the development of more precise and efficient manufacturing techniques.