Cambridge, United Kingdom

Ji Xu


Average Co-Inventor Count = 4.4

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2022-2023

where 'Filed Patents' based on already Granted Patents

2 patents (USPTO):

Title: The Innovative Contributions of Ji Xu

Introduction

Ji Xu is a notable inventor based in Cambridge, GB, recognized for his significant contributions to electronic design automation (EDA). With a total of two patents to his name, he has made strides in optimizing circuit design through innovative methodologies.

Latest Patents

Ji Xu's latest patents include "Identifying redundant logic based on clock gate enable condition" and "Determining clock gates for decloning based on simulation and satisfiability solver." The first patent focuses on determining redundant logic in circuit designs by utilizing enable conditions of clock gates. This approach leverages a satisfiability solver to identify redundant logic linked to clock circuit elements. The second patent addresses the determination of clock gates for decloning, employing simulation processes to assess the logical equivalence of enable signals associated with clock gates. This innovative method enhances the efficiency of circuit design processes.

Career Highlights

Ji Xu is currently employed at Cadence Design Systems, Inc., a leading company in the field of electronic design automation. His work at Cadence has allowed him to apply his inventive skills to real-world challenges in circuit design, contributing to advancements in the industry.

Collaborations

Throughout his career, Ji Xu has collaborated with esteemed colleagues, including Matthew David Eaton and George Simon Taylor. These collaborations have fostered a creative environment that encourages innovation and the sharing of ideas.

Conclusion

Ji Xu's contributions to electronic design automation through his patents and work at Cadence Design Systems, Inc. highlight his role as a key innovator in the field. His efforts continue to influence the landscape of circuit design and optimization.

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