Hsinchu, Taiwan

Jen-Huang Jeng

This inventor holds 4 USPTO granted patents. Top assignee: Industrial Technology Research Institute. Active years: 1992-2000.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jen-Huang Jeng. Retrieved from https://idiyas.com/inventor/jen-huang-jeng

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 2.4

ph-index = 4

Forward Citations = 57(Granted Patents)


Location History:

  • Chien-Kung, TW (1995)
  • Hsinchu, TW (1992 - 2000)

Company Filing History:


Years Active: 1992-2000

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4 patents (USPTO):Explore Patents

Title: Innovations of Inventor Jen-Huang Jeng

Introduction

Jen-Huang Jeng is a prominent inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of integrated circuit technology, holding a total of 4 patents. His work focuses on improving bonding processes and structures in semiconductor manufacturing.

Latest Patents

One of his latest patents is titled "Method for tape automated bonding to composite bumps." This innovative process involves bonding a tape-carrier through its finger leads to composite bumps on an integrated circuit chip. The composite bumps are constructed using a polymeric material layer and at least one metal layer. This design helps eliminate structural damages during the bonding process, which are often caused by rigid metal bumps. The tape automated bonding process can be executed using various types of lead frames, including all-metal, plated metal, or polymer reinforced metal lead frames. Additionally, the polymer/metal composite bumps require a smaller bonding force when bonded in a thermal bonder.

Another notable patent is "Structure for composite bumps." This patent describes a composite bump structure that includes a first metal layer, a polymer bump formed on the first metal layer, and a second metal layer covering both the polymer bump and the first metal layer. The first metal layer is positioned above an input/output pad on an integrated circuit element, with the polymer bump located off-center. This design establishes an open area next to the polymer bump for probing tests, enhancing testability.

Career Highlights

Jen-Huang Jeng is associated with the Industrial Technology Research Institute, where he continues to innovate and develop new technologies in the semiconductor field. His work has significantly impacted the efficiency and reliability of integrated circuit manufacturing.

Collaborations

He has collaborated with notable colleagues, including Shyh-Ming Chang and T E Hsieh, contributing to advancements in their shared field of expertise.

Conclusion

Jen-Huang Jeng's innovative patents and contributions to semiconductor technology highlight his role as a leading inventor in the industry. His work continues to influence the future of integrated circuit manufacturing.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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