Houston, TX, United States of America

Jeffrey K Kaszubinski

This inventor holds 5 USPTO granted patents. Top assignee: Texas Instruments Corporation. Active years: 1988-1989.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jeffrey K Kaszubinski. Retrieved from https://idiyas.com/inventor/jeffrey-k-kaszubinski

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 3.3

ph-index = 4

Forward Citations = 45(Granted Patents)


Location History:

  • Houston, TX (US) (1988 - 1989)
  • San Jose, CA (US) (1989)

Company Filing History:


Years Active: 1988-1989

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5 patents (USPTO):Explore Patents

Title: Innovations of Jeffrey K. Kaszubinski

Introduction

Jeffrey K. Kaszubinski is a notable inventor based in Houston, TX, with a focus on advancements in memory technology. He holds a total of 5 patents that contribute significantly to the field of integrated circuits and memory arrays. His work is characterized by innovative solutions that enhance the performance and reliability of memory systems.

Latest Patents

One of his latest patents is titled "Reference Circuit for Integrated Memory Arrays Having Virtual Ground." This invention discloses a reference-column circuit designed to supply a reference voltage for sensing the programming status of read-only-memory cells. The circuit includes an adjacent non-programmed memory cell that shares a common terminal with an identical non-programmed memory cell from prior-art circuitry. This additional memory cell, along with its grounding circuit, provides a compensating component of reference voltage to the input of a sense amplifier, effectively eliminating potential errors in transmission caused by non-programmed adjacent memory cells.

Another significant patent is "Memory Array with Partitioned Bit Lines." This invention features a memory array that consists of two separate sets of parallel bit lines, intersected by a word line. The memory cells utilized are floating-gate MOS transistors, with gates connected to the corresponding word lines and source-to-drain paths linked between alternating sets of bit lines and ground lines. This design enhances the efficiency and functionality of memory arrays.

Career Highlights

Jeffrey K. Kaszubinski is currently employed at Texas Instruments Corporation, a leading company in semiconductor design and manufacturing. His contributions to the field have been recognized through his patents, which reflect his expertise and innovative thinking in memory technology.

Collaborations

Throughout his career, Jeffrey has collaborated with notable colleagues, including John Frederic Schreck and Timmie M. Coffman. These collaborations have likely fostered an environment of innovation and creativity, leading to advancements in their respective projects.

Conclusion

Jeffrey K. Kaszubinski's work in the field of memory technology showcases his innovative spirit and dedication to improving integrated circuits. His patents not only highlight his technical skills but also contribute to the ongoing evolution of memory systems.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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