Ballston Lake, NY, United States of America

Jeffrey Chee

USPTO Granted Patents = 5 

Average Co-Inventor Count = 4.8

ph-index = 2

Forward Citations = 11(Granted Patents)


Company Filing History:


Years Active: 2018-2021

Loading Chart...
5 patents (USPTO):

Title: The Innovative Contributions of Jeffrey Chee

Introduction

Jeffrey Chee is a notable inventor based in Ballston Lake, NY (US), recognized for his significant contributions to the field of semiconductor technology. With a total of five patents to his name, Chee has developed innovative methods that enhance the efficiency and effectiveness of interconnects and structures in semiconductor devices.

Latest Patents

Among his latest patents, Chee has introduced groundbreaking techniques such as "Multiple patterning with self-alignment provided by spacers." This method involves the formation of interconnects through a series of precise steps, including the creation of first trenches and the application of sidewall spacers. Another notable patent is "Gate cut first isolation formation with contact forming process mask protection." This invention details a method for forming gate cut openings in dummy gates, which is crucial for the development of field-effect transistor (FET) structures.

Career Highlights

Throughout his career, Jeffrey Chee has worked with prominent companies in the semiconductor industry, including GlobalFoundries Inc. and GlobalFoundries U.S. Inc. His experience in these organizations has allowed him to refine his skills and contribute to cutting-edge technologies in semiconductor manufacturing.

Collaborations

Chee has collaborated with talented individuals in his field, including Sipeng Gu and Xusheng Kevin Wu. These partnerships have fostered a creative environment that has led to the development of innovative solutions in semiconductor technology.

Conclusion

Jeffrey Chee's work exemplifies the spirit of innovation in the semiconductor industry. His patents and career achievements highlight his commitment to advancing technology and improving the efficiency of semiconductor devices.

This text is generated by artificial intelligence and may not be accurate.
Please report any incorrect information to support@idiyas.com
Loading…