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For the Inventor, By the Inventor

Messana, NY, United States of America

Jeanna N Matthews

USPTO Granted Patents = 14

Average Co-Inventor Count = 2.2

ph-index = 6

Forward Citations = 165(Granted Patents)


Location History:

  • Messana, NY (US) (2005)
  • Massena, NY (US) (2005 - 2013)

Company Filing History:

goldMedal14 out of 54,780 
 
Intel Corporation
 patents

Years Active: 2005-2013

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14 patents (USPTO):Explore Patents
1. 8433854 - Apparatus and method for cache utilization (2013-04-30),
2. 8347141 - Method and apparatus to maintain data integrity in disk cache memory during and after periods of cache inaccessibility (2013-01-01),
3. 7970989 - Write ordering on disk cached platforms (2011-06-28),
4. 7962785 - Method and apparatus to maintain data integrity in disk cache memory during and after periods of cache inaccessibility (2011-06-14),
5. 7886110 - Dynamically adjusting cache policy based on device load in a mass storage system (2011-02-08),
6. 7797479 - Technique to write to a non-volatile memory (2010-09-14),
7. 7640395 - Maintaining write ordering in a system (2009-12-29),
8. 7627713 - Method and apparatus to maintain data integrity in disk cache memory during and after periods of cache inaccessibility (2009-12-01),
9. 7558911 - Maintaining disk cache coherency in multiple operating system environment (2009-07-07),
10. 7401188 - Method, device, and system to avoid flushing the contents of a cache by not inserting data from large requests (2008-07-15),
11. 7360015 - Preventing storage of streaming accesses in a cache (2008-04-15),
12. 7127571 - Method and system to adjust non-volatile cache associativity (2006-10-24),
13. 6920533 - System boot time reduction method (2005-07-19),
14. 6839812 - Method and system to cache metadata (2005-01-04),

Title: Jeanna N Matthews: Innovator in Cache Utilization and Data Integrity

Introduction

Jeanna N Matthews is a prominent inventor based in Messana, NY (US), known for her significant contributions to technology and data management. With a total of 14 patents to her name, she has made remarkable strides in the field of electronic systems and cache memory.

Latest Patents

Among her latest patents is the "Apparatus and method for cache utilization." This invention describes an electronic system that includes a cache positioned between mass storage and system memory. The system is designed to prevent the storage of stream data in the cache, allowing for direct communication between system memory and mass storage based on a comparison of metadata. Another notable patent is the "Method and apparatus to maintain data integrity in disk cache memory during and after periods of cache inaccessibility." This invention addresses the challenges faced when cache memory becomes inaccessible, ensuring that a log of write operations is maintained to update the cache when it becomes available.

Career Highlights

Jeanna N Matthews is currently employed at Intel Corporation, where she continues to innovate and develop cutting-edge technologies. Her work has had a significant impact on the efficiency and reliability of data management systems.

Collaborations

Throughout her career, Jeanna has collaborated with esteemed colleagues, including Sanjeev N Trika and John I Garney, contributing to various projects and advancements in technology.

Conclusion

Jeanna N Matthews stands out as a leading inventor in the realm of cache utilization and data integrity. Her innovative patents and contributions to Intel Corporation highlight her dedication to advancing technology and improving data management systems.

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