This inventor holds 1 USPTO granted patent. Top assignee: Freescale Semiconductor,inc.. Active years: 2010.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2010
Title: The Innovations of Jean-Louis Chaptal
Introduction
Jean-Louis Chaptal is a notable inventor based in Toulouse, France. He has made significant contributions to the field of non-volatile memory devices. His innovative approach has led to the development of a unique method for testing these devices, which is crucial for ensuring their reliability and performance.
Latest Patents
Chaptal holds a patent for a method and apparatus for testing a floating gate non-volatile memory semiconductor device. This invention involves an array of cells that store data in the form of electrical charge. The method includes applying a test pattern of electrical charge to the floating gates, exposing the device to energy to accelerate leakage of the electrical charges, and comparing the remaining charges to the test pattern. The energy is applied in the form of electromagnetic radiation, specifically within the wavelength range of 440 to 560 nm, which excites the charges in the floating gates to enhance charge loss from defective cells.
Career Highlights
Jean-Louis Chaptal is associated with Freescale Semiconductor, Inc., where he has been able to apply his expertise in semiconductor technology. His work has been instrumental in advancing the capabilities of non-volatile memory devices, making them more efficient and reliable.
Collaborations
Chaptal has collaborated with notable colleagues such as Laurence Morancho-Montagner and Serge De Bortoli. These partnerships have fostered a collaborative environment that encourages innovation and the sharing of ideas.
Conclusion
Jean-Louis Chaptal's contributions to the field of non-volatile memory devices exemplify the importance of innovation in technology. His patent reflects a significant advancement in testing methods, which is essential for the future of semiconductor devices.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile