This inventor holds 1 USPTO granted patent. Top assignee: Carnegie Mellon University. Active years: 1996.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 1996
Title: Janusz E Rajski: Innovator in Test Pattern Generation
Introduction
Janusz E Rajski is a notable inventor based in Montreal, Canada. He has made significant contributions to the field of electronic circuit design, particularly in the area of test pattern generation. His innovative approach enhances both the efficiency and quality of test patterns for sequential logic circuits.
Latest Patents
Janusz E Rajski holds 1 patent related to his work. His patent focuses on test pattern generation for electronic circuits, specifically for sequential logic circuits that include combinational logic elements and sequential elements such as D flip-flops. The invention improves generation time and test pattern quality by transforming the circuit to simplify the process of test pattern generation. One embodiment of his invention utilizes a retiming transformation, which allows sequential elements to be moved across combinational logic elements. This increases the ratio of traversable states, thereby simplifying the circuit for test pattern generation. The generated test set is applicable to both the transformed test circuit and the manufactured circuit.
Career Highlights
Janusz E Rajski has had a distinguished career, contributing to advancements in electronic circuit design. His work has been recognized for its impact on improving the efficiency of test pattern generation, which is crucial for ensuring the reliability of electronic devices.
Collaborations
Throughout his career, Janusz has collaborated with esteemed colleagues, including Aiman H El-Maleh and Wojciech P Maly. These collaborations have further enriched his research and innovations in the field.
Conclusion
Janusz E Rajski's contributions to test pattern generation represent a significant advancement in electronic circuit design. His innovative methods enhance the efficiency and quality of testing, making a lasting impact on the industry.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
