Mehring, Germany

Jürgen Hage

This inventor holds 1 USPTO granted patent. Top assignee: Other. Active years: 2002.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jürgen Hage. Retrieved from https://idiyas.com/inventor/janduumlrgen-hage

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 6.0

ph-index = 1

Forward Citations = 2(Granted Patents)


Company Filing History:

goldMedal1 out of 834,453 
Other
 patents

Years Active: 2002

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1 patent (USPTO):Explore Patents

Title: Jürgen Hage: Innovator in Semiconductor Technology

Introduction

Jürgen Hage is a notable inventor based in Mehring-Öd, Germany. He has made significant contributions to the field of semiconductor technology, particularly through his innovative patent.

Latest Patents

Hage holds a patent for a semiconductor wafer with crystal lattice defects and the process for producing this wafer. This invention features a semiconductor wafer that includes a front side, a back side, a top layer, a bottom layer, an upper inner layer beneath the top layer, a lower inner layer above the bottom layer, and a central region between the layers. The wafer is characterized by an uneven distribution of crystal lattice defects, which may include nitrogen or vacancies either substitutionally or interstitially.

Career Highlights

Throughout his career, Jürgen Hage has focused on advancing semiconductor technology. His work has been instrumental in improving the efficiency and performance of semiconductor devices.

Collaborations

Hage has collaborated with notable colleagues such as Gunther Obermeier and Alfred Buchner, contributing to various projects in the semiconductor field.

Conclusion

Jürgen Hage's innovative work in semiconductor technology, particularly his patent on wafers with crystal lattice defects, showcases his expertise and commitment to advancing the industry. His contributions continue to influence the development of semiconductor devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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