Jan M J Janssen

Title: Jan M J Janssen: Innovator in System Level Modeling Simulation

Introduction

Jan M J Janssen is a notable inventor based in Heerlen, Netherlands. He has made significant contributions to the field of system level modeling simulation, holding a total of 4 patents. His work focuses on enhancing the efficiency and safety of multi-threaded simulations, which are crucial in modern computing environments.

Latest Patents

One of Janssen's latest patents is titled "Guarded memory access in a multi-thread safe system level modeling simulation." This patent outlines methods, systems, and machine-readable mediums for conducting multi-thread safe system level modeling simulations (SLMS) of a target system on a host system. An example of such a simulation is a SYSTEMC simulation. During the SLMS, processes are executed in parallel through multiple threads, representing the functional behaviors of components within the target system, including processor cores. The patent also discusses the use of deferred execution to manage operations that access shared resources, ensuring that memory access is conducted safely and efficiently.

Career Highlights

Jan M J Janssen is currently employed at Synopsys, Inc., where he continues to innovate in the field of system level modeling. His expertise in multi-threaded simulations has positioned him as a key player in advancing technology in this area.

Collaborations

Throughout his career, Janssen has collaborated with notable colleagues, including Thorsten H Grötker and Christoph Schumacher. These collaborations have further enriched his work and contributed to the development of advanced simulation techniques.

Conclusion

Jan M J Janssen is a distinguished inventor whose work in system level modeling simulation has led to significant advancements in the field. His patents reflect a deep understanding of multi-threaded processes and memory management, making him a valuable asset to the technology community.