Jan Durec

Title: Jan Durec - Innovator in Semiconductor Device Alignment

Introduction

Jan Durec is an accomplished inventor based in San Jose, CA (US). He has made significant contributions to the field of semiconductor technology, particularly in the area of image-to-CAD alignment. His innovative approach has led to the development of a unique patent that enhances the accuracy of semiconductor device representation.

Latest Patents

Jan Durec holds a patent titled "P and N region differentiation for image-to-CAD alignment." This patent describes a method for aligning an image of a semiconductor device with a bitmap representation. The process involves receiving diffusion layer information and implant layer information of the semiconductor device. By deriving distinct p- and n-doped region information from this data, the method generates a bitmap representation that differentiates between the p- and n-doped regions. This innovation facilitates a precise alignment operation of the semiconductor device image with the generated bitmap representation. Jan Durec has 1 patent to his name.

Career Highlights

Jan Durec is currently employed at Dcg Systems GmbH, where he continues to push the boundaries of semiconductor technology. His work focuses on improving the methodologies used in the alignment of semiconductor devices, which is crucial for the advancement of electronic components.

Collaborations

Jan collaborates with Catherine Kardach, who is also a key figure in the field. Their partnership exemplifies the importance of teamwork in driving innovation and achieving breakthroughs in technology.

Conclusion

Jan Durec's contributions to semiconductor device alignment through his patent demonstrate his commitment to innovation in the field. His work not only enhances the accuracy of semiconductor representations but also paves the way for future advancements in technology.