Palo Alto, CA, United States of America

James G Washburn


Average Co-Inventor Count = 3.0

ph-index = 2

Forward Citations = 137(Granted Patents)


Company Filing History:


Years Active: 2000-2001

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2 patents (USPTO):Explore Patents

Title: Innovations of James G. Washburn

Introduction

James G. Washburn is an accomplished inventor based in Palo Alto, CA. He has made significant contributions to the field of memory technology, holding a total of 2 patents. His work focuses on enhancing the capabilities of content addressable memory systems.

Latest Patents

Washburn's latest patents include "Enhanced binary content addressable memory for longest prefix address matching" and "Ternary content addressable memory (CAM) having fast insertion and massive, parallel shift capability." The first patent describes a modified binary content addressable memory (CAM) that features fast variable prefix matching capabilities. This innovative design includes modified CAM cells equipped with store/compare circuits and multiplexer (MUX) circuits, allowing for efficient data value comparison and shifting. The second patent presents a ternary CAM that enables parallel shifting between CAM cells across different rows, enhancing the speed and efficiency of data processing.

Career Highlights

James G. Washburn is currently employed at Lara Technology, Inc., where he continues to develop cutting-edge memory technologies. His expertise in the field has positioned him as a key player in advancing memory systems.

Collaborations

Throughout his career, Washburn has collaborated with notable colleagues, including Jayan R. Ramankutty and Ajit K. Medhekar. These partnerships have contributed to the innovative projects he has undertaken.

Conclusion

James G. Washburn's contributions to memory technology through his patents and work at Lara Technology, Inc. highlight his role as a significant inventor in the field. His innovative designs continue to push the boundaries of what is possible in content addressable memory systems.

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