Location History:
- Los Altos, CA (US) (2015)
- San Jose, CA (US) (2019)
Company Filing History:
Years Active: 2015-2019
Title: Innovations by Jaideep Mukherjee
Introduction
Jaideep Mukherjee is a prominent inventor based in San Jose, California. He has made significant contributions to the field of integrated circuit design, holding a total of four patents. His work focuses on enhancing the efficiency of memory usage in circuit simulations.
Latest Patents
Jaideep's latest patents include innovative methods for simulating integrated circuit designs. One of his patents describes a method for integrated circuit simulation with efficient memory usage. This method involves executing a characterization tool over a portion of a parameter space to form a netlist. It also includes forming a sub-netlist, selecting conditions such as process, voltage, or temperature, and executing simulations to incorporate results into a circuit performance report. Another notable patent is for integrated circuit simulation with variability analysis for efficient memory usage. This method partitions an IC netlist into blocks based on performance values and analyzes direct-current solutions, enhancing the transient analysis of signals over time.
Career Highlights
Jaideep Mukherjee is currently employed at Cadence Design Systems, Inc., where he continues to innovate in the field of integrated circuit design. His expertise in simulation methods has positioned him as a valuable asset in the industry.
Collaborations
Jaideep has collaborated with notable colleagues such as Saibal Saha and Jianyu Li, contributing to advancements in integrated circuit technology.
Conclusion
Jaideep Mukherjee's work in integrated circuit simulation has led to significant advancements in memory efficiency and performance analysis. His contributions continue to shape the future of circuit design.