Suwon-si, South Korea

Jaejoon Oh

This inventor holds 2 USPTO granted patents and 3 published patent applications. Top assignee: Samsung Electronics Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jaejoon Oh. Retrieved from https://idiyas.com/inventor/jaejoon-oh-33gnj7mj

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 2 

Average Co-Inventor Count = 7.0


Company Filing History:


Years Active: 2026

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2 patents (USPTO):Explore Patents

Title: Jaejoon Oh: Semiconductor and Power-Device Innovations

Introduction

Jaejoon Oh is an inventor based in Suwon-si, South Korea, whose patent work focuses on semiconductor devices and power-device design. His portfolio includes 2 patents, and he works at Samsung Electronics.

Latest Patents

Oh’s listed patents address semiconductor structures and thermal management in power devices.

“Semiconductor device sidewall of the gate semiconductor layer including a plurality of surfaces having different slopes” describes a semiconductor device with a gate semiconductor layer positioned between a barrier layer and a gate electrode. The layer’s sidewall connects its lower and upper surfaces, which differ in area, and includes multiple surfaces with different slopes. The design also incorporates a channel layer, source, and drain.

“Power device and method of manufacturing the same” describes a power device built on a substrate with an epitaxially grown compound semiconductor layer, a gate, and source and drain electrodes. Its substrate includes a cooling-space region designed to form an internal cooling path. The region has an enlargement whose width increases with depth, while its inlet is narrower than its maximum width.

Career Highlights

Oh’s patent work reflects an emphasis on semiconductor device architecture and power-device manufacturing. The inventions describe approaches to gate-layer geometry and cooling-path formation within a substrate.

Collaborations

Oh’s listed coworkers include Joonyong Kim and Sunkyu Hwang. These names provide context for his professional connections, though the supplied information does not specify their roles in the patents.

Conclusion

Jaejoon Oh’s two listed patents highlight his contributions to semiconductor and power-device design, including gate-layer structures and integrated cooling paths.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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