Hwaseong, South Korea

Jae Ran Jang

This inventor holds 2 USPTO granted patents and 2 published patent applications. Top assignee: Samsung Electronics Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jae Ran Jang. Retrieved from https://idiyas.com/inventor/jae-ran-jang-zfppqb5w

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 2 

% Patents Active = 100.0

Average Co-Inventor Count = 6.5

ph-index = 1


Company Filing History:


Years Active: 2026

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2 patents (USPTO):Explore Patents

Title: Jae Ran Jang: Semiconductor Device Inventor

Introduction

Jae Ran Jang is an inventor based in Hwaseong, South Korea. His patent work focuses on semiconductor device structures and fabrication, including transistor architectures and source/drain contacts. He is associated with Samsung Electronics.

Latest Patents

Jang’s listed portfolio includes 2 patents, covering the following inventions.

Semiconductor Device That Includes a Multi-Bridge Channel Field Effect Transistor

This patent describes a semiconductor device with first and second active patterns, a gate electrode, multiple source regions, and a drain region. Separate contacts connect to the source and drain regions, while a through via links one contact to a lower wiring layer. The design integrates transistor components with underlying interconnects.

Semiconductor Device Including Source/Drain Pattern Having High Concentration Impurity Region and Method for Fabricating the Same

This invention describes a semiconductor device with spaced gate structures and a source/drain pattern formed in a recess between them. The pattern includes silicon-germanium liner, filling, and insertion films. A source/drain contact and contact silicide film are arranged to connect with the source/drain structure.

Career Highlights

Jang’s listed inventions address semiconductor device design and fabrication, with particular attention to transistor structures, source/drain regions, contacts, and interconnects. His work is associated with Samsung Electronics.

Collaborations

The provided information lists Heon Jong Shin and Seon-Bae Kim as Jang’s coworkers. It does not specify their roles or the details of any joint patent work.

Conclusion

Jae Ran Jang’s listed patent portfolio reflects work on semiconductor devices, including multi-bridge channel transistors and engineered source/drain structures.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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