The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 13, 2026

Filed:

Feb. 12, 2024
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Jong Min Shin, Suwon-si, KR;

Heon Jong Shin, Suwon-si, KR;

June Young Park, Suwon-si, KR;

Jae Ran Jang, Suwon-si, KR;

Sang Hee Lee, Suwon-si, KR;

Kerm Rim, Suwon-si, KR;

Sung Gyu Han, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 30/43 (2025.01); H10D 30/01 (2025.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10D 62/13 (2025.01); H10D 64/01 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10D 84/83 (2025.01); H10W 20/20 (2026.01); H10W 20/43 (2026.01);
U.S. Cl.
CPC ...
H10D 30/6757 (2025.01); H10D 30/014 (2025.01); H10D 30/43 (2025.01); H10D 30/6735 (2025.01); H10D 62/121 (2025.01); H10D 62/151 (2025.01); H10D 64/017 (2025.01); H10D 84/0149 (2025.01); H10D 84/038 (2025.01); H10D 84/83 (2025.01); H10W 20/20 (2026.01); H10W 20/43 (2026.01);
Abstract

A semiconductor device includes: a lower interlayer insulating layer; first and second active patterns on the lower interlayer insulating layer; a gate electrode on the first and second active patterns; a first source region on a first side of the gate electrode; a second source region on a second side of the gate electrode; a third source region on the first side of the gate electrode; a drain region on the second side of the gate electrode; a first contact adjacent to the gate electrode, and connected to the first and third source regions; a second contact adjacent to the gate electrode, and connected to the second source region; a third contact adjacent to the gate electrode, and connected to the drain region; a lower wiring layer inside the lower interlayer insulating layer; and a through via connecting the lower wiring layer with the first contact.


Find Patent Forward Citations

Shin, Jong. (2026). Semiconductor device that includes a multi-bridge channel field effect transistor (U.S. Patent No. 12765004). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12765004

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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