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For the Inventor, By the Inventor

Suwon, South Korea

Jae-ran Jang

This inventor holds 6 USPTO granted patents. Top assignee: Samsung Electronics Co., Ltd.. Active years: 2017-2023.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jae-ran Jang. Retrieved from https://idiyas.com/inventor/jae-ran-jang

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 6

% Patents Active = 100.0

Average Co-Inventor Count = 3.8

ph-index = 2

Forward Citations = 9(Granted Patents)


Company Filing History:

goldMedal6 out of 132,108 
 
Samsung Electronics Co., Ltd.
 patents

Years Active: 2017-2023

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6 patents (USPTO):Explore Patents
1. 11769769 - Integrated circuit device and method of fabricating the same (2023-09-26),
2. 11316010 - Integrated circuit device and method of fabricating the same (2022-04-26),
3. 10879239 - Integrated circuit device and method of fabricating the same (2020-12-29),
4. 10763256 - Integrated circuit device and method of fabricating the same (2020-09-01),
5. 10665588 - Integrated circuit device and method of fabricating the same (2020-05-26),
6. 9812552 - Methods for fabricating semiconductor devices (2017-11-07),

Title: Jae-ran Jang: Innovator in Integrated Circuit Technology

Introduction

Jae-ran Jang is a prominent inventor based in Suwon-si, South Korea. He has made significant contributions to the field of integrated circuit technology, holding a total of 6 patents. His work has been instrumental in advancing the capabilities of electronic devices.

Latest Patents

One of Jae-ran Jang's latest patents is focused on an integrated circuit device and the method of fabricating the same. This innovative device features a fin-type active region that extends on a substrate in a first horizontal direction. A gate line intersects this region in a second horizontal direction. Additionally, a source/drain region is strategically placed in the fin-type active region adjacent to the gate line. The design includes an insulating cover that runs parallel to the substrate, with the gate line and source/drain region positioned between the insulating cover and the substrate. A source/drain contact extends vertically through the insulating cover, ensuring a secure connection to the source/drain region. Furthermore, a fin isolation insulating unit is integrated into the fin-type active region, enhancing the overall functionality of the device.

Career Highlights

Jae-ran Jang is currently employed at Samsung Electronics Co., Ltd., a leading company in the technology sector. His role at Samsung has allowed him to work on cutting-edge projects that push the boundaries of integrated circuit design. His expertise and innovative mindset have made him a valuable asset to the company.

Collaborations

Throughout his career, Jae-ran Jang has collaborated with talented individuals such as Hwi-Chan Jun and Heon-jong Shin. These collaborations have fostered a creative environment that encourages the development of groundbreaking technologies.

Conclusion

Jae-ran Jang's contributions to integrated circuit technology exemplify his dedication to innovation and excellence. His patents and work at Samsung Electronics Co., Ltd. highlight his significant impact on the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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