Saratoga, CA, United States of America

Jae Cho


Average Co-Inventor Count = 4.8

ph-index = 5

Forward Citations = 126(Granted Patents)


Location History:

  • Sunnyvale, CA (US) (2002 - 2004)
  • Saratoga, CA (US) (2005 - 2012)

Company Filing History:


Years Active: 2002-2012

where 'Filed Patents' based on already Granted Patents

8 patents (USPTO):

Title: Innovations of Jae Cho: Pioneering Semiconductor Technologies

Introduction

Jae Cho, an accomplished inventor based in Saratoga, California, has significantly contributed to the field of semiconductor technology with his inventive prowess. With a total of eight patents to his name, his innovations showcase advanced strategies for enhancing integrated circuit (IC) performance and testing methodologies.

Latest Patents

Two of Jae Cho's latest patents exemplify his innovative approach to semiconductor design. The first patent, titled "Method and apparatus for self-regulated burn-in of an integrated circuit," introduces a sophisticated method for burn-in processes of ICs. This invention involves the configuration of programmable resources to establish a load controller comprising multiple heat core circuits. Through meticulous monitoring of junction temperatures, the load controller adjusts the activation of heat core circuits, optimizing the performance of the integrated circuit.

His second recent patent, "Semiconductor component having test pads and method and apparatus for testing same," details a novel methodology for testing semiconductor components. This invention outlines a procedure using an un-bumped substrate equipped with a pattern of bond pads and several test pads that facilitate efficient communication with respective bond pads. By testing substrates through these innovative test pads, Jae Cho underscores the importance of enhancing testing accuracy in semiconductor components.

Career Highlights

Currently, Jae Cho is associated with Xilinx, Inc., a leading player in the semiconductor industry known for its pioneering contributions to programmable logic devices. His innovative spirit and technical expertise have played a key role in the development and refinement of semiconductor technologies, especially in the context of improving IC reliability and functional testing.

Collaborations

Throughout his career, Jae Cho has collaborated with notable colleagues, including Robert W. Wells and Zhi-min Ling. These partnerships have yielded significant advancements in semiconductor technology and underscore the collective expertise within the field.

Conclusion

In summary, Jae Cho's inventive contributions to semiconductor technology through his eight patents highlight his position as a leading inventor in the industry. His work at Xilinx, Inc. and collaborations with esteemed colleagues reflect his dedication to advancing the capabilities of integrated circuits and semiconductor testing methodologies. Jae Cho's innovations are paving the way for more reliable and efficient electronic devices.

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