This inventor holds 1 USPTO granted patent. Top assignee: Micron Technology Incorporated. Active years: 2024.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2024
Title: Jack Riley - Innovator in Memory Technology
Introduction
Jack Riley is a notable inventor based in Boise, Idaho, recognized for his contributions to memory technology. With a focus on enhancing memory access operations, he has developed innovative solutions that address critical challenges in the field.
Latest Patents
Jack Riley holds a patent for "Apparatuses and methods for bad row mode." This invention involves methods that prevent proper access operations on a selected bad row of memory. The technology allows the memory to store a bad row address and suppress signals or change data when an access address matches this bad row address. This bad row mode is essential for providing positive control during post-package repair operations on memory devices.
Career Highlights
Jack Riley is currently employed at Micron Technology Incorporated, a leading company in semiconductor manufacturing. His work at Micron has positioned him at the forefront of memory technology innovation. He has made significant strides in improving memory reliability and performance through his inventive solutions.
Collaborations
Jack collaborates with talented colleagues, including Scott Eugene Smith and Christian N Mohr. Their combined expertise contributes to the advancement of memory technology and the development of innovative solutions within the industry.
Conclusion
Jack Riley's contributions to memory technology through his patent and work at Micron Technology Incorporated highlight his role as an influential inventor. His innovative approaches continue to shape the future of memory access operations.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
